En passant, it is quite perverse that the standard textbook on computer architecture entitled “Computer Architecture—A Quantitative Approach” fails to define what “instruction level parallelism” (ILP) is. Unless I overlooked something obvious, the Sixth Edition of Computer Architecture by Hennessy and Patterson lacks a coherent definition of ILP.

On page 5 it says:

“In 2004 Intel canceled its high-performance uniprocessor projects and joined others in declaring that the road to higher performance would be via multiple processors per chip rather than via faster uniprocessors. This milestone signaled a historic switch from relying solely on instruction-level parallelism (ILP), the primary focus of the first three editions of this book…”

One would therefore expect that if ILP was the key focus of the first three editions of the book, it would at the very least be defined, instead of presupposing its meaning is sufficiently understood. The omission is particularly glaring in light of the fact that the book goes on and on about TLP (Thread Level Parallelism) and DLP (Data Level Parallelism); however, without a coherent definition of ILP, it is challenging to adequately describe the difference between these concepts and therefore understand their scope and limits. While practitioners of computer architecture most likely have a decent notion of the ILP concept, and use it as an argument to advance and describe properties of optimisations and design choices, it is intellectually reckless to assert what something is for without first establishing what that something is by providing an axiomatic definition, especially in a standard textbook.

Links